Rust Logic Simulator
Hello everyone, I'm developing this for a few months now. This is a project inspired by Logisim, it allows to simulate different logic circuits.
I want you to try it and tell me what would you want for me to add or change, provide overall feedback.
Features like placing entire circuit board as a circuit in another circuit board, HDL languages support, different interactable components are already in to-do.I also will need to rename the project, because current name \rls\\ collides with Rust Language Server
GitHub page: https://github.com/ved-s/rls
Web version: https://ved-s.github.io/rls/
